1. Field of the Invention
The present invention relates to an organic light emitting display (OLED) and a method of fabricating the same, and more particularly, to an OLED and a method of fabricating the same that is capable of improving product reliability by forming an auxiliary electrode line to be in contact with a second electrode power supply line to remove an organic layer on the auxiliary electrode line and minimize the organic layer on a pixel region, thereby preventing pixel shrinkage resulting from degradation of an organic emission layer caused by out-gassing from the organic layer.
2. Description of the Related Art
An organic light emitting display (OLED) is an emissive flat panel display that has beneficial characteristics such as a wide viewing angle, rapid response speed, small thickness, low manufacturing cost, high contrast, and so on. Accordingly, it is attracting attention as a next-generation flat panel display.
Conventionally, the OLED includes an anode, a cathode, and an organic emission layer formed therebetween, so that holes supplied from the anode and electrons supplied from the cathode are combined in the organic emission layer to generate excitons, i.e., electron-hole pairs, to thereby emit light by energy generated when the excitons de-excite and return to ground state.
Generally, the OLED is classified into a passive matrix OLED and an active matrix OLED according to a manner in which N×M pixels disposed in the form of a matrix are driven. In the passive matrix OLED, an anode and a cathode cross each other and electrode lines are selectively driven. In the active matrix OLED, a thin film transistor and a capacitor are connected to a pixel electrode of each pixel region to maintain a voltage by a capacitance.
Each unit pixel of the active matrix OLED basically includes a switching transistor, a driving transistor, a capacitor, and an EL device. A common power source is provided to the driving transistor and the capacitor from a power supply line, which functions to control current flowing to the EL device through the driving transistor. In addition, an auxiliary electrode line is an auxiliary power supply line for supplying power to a second electrode to form a potential difference between source and drain electrodes and the second electrode to make current flow.
FIG. 1 is a cross-sectional view illustrating a conventional active OLED and a method of fabricating the same.
Referring to FIG. 1, the conventional active OLED includes a substrate 100 having a pixel region (a) and a metal line region (b), and a buffer layer 105 formed on the substrate 100. A semiconductor layer 110 including source and drain regions 110a and 110c and a channel region 110b is patterned on the buffer layer 105 of the pixel region (a).
Then, a gate insulating layer 120 is formed on the entire surface of the semiconductor layer 110, and a gate electrode 130 is formed on the gate insulating layer 120 of the pixel region (a) corresponding to the channel region 110b. An interlayer insulating layer 140 is formed on the entire surface of the substrate including the gate electrode 130, and the source and drain regions 110a and 110b of the semiconductor layer 110 are connected to source and drain electrodes 145 through contact holes 141 formed in the interlayer insulating layer 140 of the pixel region (a). When the source and drain electrodes 145 of the pixel region (a) are formed, a first conductive pattern 147 made of the same material as the source and drain electrodes 145 is also formed on the metal line region (b), which functions as an auxiliary electrode line. As a result, a thin film transistor including the semiconductor layer 110, the gate electrode 130, and the source and drain electrodes 145 is formed.
Then, an insulating layer 150 functioning as a passivation layer and/or a planarization layer is formed on the entire surface of the substrate including the source and drain electrodes 145 and the first conductive pattern 147, and the insulating layer 150 formed on the first conductive pattern 147 of the metal line region (b) is removed by an etching process to expose an upper portion of the first conductive pattern 147.
A via-hole 155 for exposing one of the source and drain electrodes 145 is formed at the insulating layer 150 of the pixel region (a), and a first electrode 170 is patterned to be in contact with one of the source and drain electrodes 145 through the via-hole 155 and to expand onto the insulating layer 150.
Then, a pixel defining layer 175 having an opening is formed on the first electrode 170 and the insulating layer 150, excluding the metal line region (b). An organic layer 180 including at least an organic emission layer is patterned on the first electrode 170 exposed in the opening of the pixel region (a), and a second electrode 190 is formed on the entire surface of the substrate including the organic layer 180. The second electrode 190 of the metal line region (b) is connected to the first conductive pattern 147.
The first conductive pattern 147 may be formed of one material selected from MoW, Mo, and W. At this time, the material has a higher heat capacity than a silicon nitride (SiNx) layer and heat transfer to the silicon nitride layer cannot be smoothly performed due to this difference, which causes an increase in heat resistance. As a result, when curing the organic layer, the organic layer cannot be smoothly reflowed to each region and consequently the thickness of the organic layer differs in each region after curing. Here, residual gas remaining around the first conductive pattern and an adjacent pixel region may cause a pixel shrinkage phenomenon due to degradation of the organic emission layer by out-gassing.
In addition, when the second electrode is formed to be in contact with the first conductive pattern, a metal material of the first conductive pattern of the metal line region is exposed when forming the first electrode of the pixel region, resulting in the metal line being damaged by an etchant or developing agent.